1. Technical Field
The present disclosure relates to the field of integrated electronic circuits, and in particular circuits comprising at least one flip-flop. For example, the present disclosure can be used to advantage in the production of shift registers, which include a cascade connection of numerous flip-flops.
2. Description of the Related Art
As is known, even when integrated circuits are in low consumption or standby mode, there is any case a static consumption which accounts for a significant share of the total energy consumption of an electronic device. This drawback has been exacerbated by the exaggerated miniaturization of electronic components and by the high performance desired. The need therefore exists to reduce static energy consumption as much as possible when the device is in standby mode.
One of the proposed solutions is based on the use of retention flip-flops wherein the flip-flop retains the data inside it in a special latch circuit. Such circuits use two types of transistors: a first type of transistor, used for normal flip-flop operation, with a standard voltage threshold (SVT), and therefore very fast; a second type of transistor, used for operation when the circuit is in low consumption mode and with a high voltage threshold (HVT), thus with very low static consumption. The transistors of the first type and the second type are powered by independent supply voltages, so that in low consumption mode, only the transistors used for data memorization which are in case of the HVT type, remain powered.
Such solution therefore sets out to combine high dynamic performance with low static consumption.
One example of this type of flip-flop is described for instance in U.S. Pat. No. 7,138,842 B2.
However, the data retention function uses dedicated circuitry and dedicated signal control logic which controls the switchover between normal operation and the low consumption mode. With a reduced static consumption, this entails a greater dynamic consumption compared to traditional flip-flops, due to the addition of transistors, and, in some cases, reduced performance, in particular of the parameters dependent on the speed of the flip-flop.
Another solution, described for example in WO2006/127888, attempts to resolve the drawbacks of the retention flip-flops described above by taking the clock signal as the stand-by command signal and memorizing the data in a latch slave without modifying the structure of the flip-flop. In this case however there is the disadvantage of more complicated clock signal management.